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ADE7880
Energy Accumulation Modes
The active power is accumulated in each watt-hour
accumulation 32-bit register (AWATTHR, BWATTHR,
CWATTHR, AFWATTHR, BFWATTHR, and CFWATTHR)
according to the configuration of Bit 5 and Bit 4 (CONSEL bits) in
the ACCMODE register. The various configurations are described
Table 14. Inputs to Watt-Hour Accumulation Registers
CONSEL AWATTHR BWATTHR CWATTHR
00 VA × IA VB × IB VC × IC
01 VA × IA VB × IB VC × IC
VB = VA – VC 1
10 VA × IA VB × IB VC × IC
VB = ?VA ? VC
11 VA × IA VB × IB VC × IC
VB = ?VA
Data Sheet
mode, the ADE7880 transfers the active energy accumulated in the
32-bit internal accumulation registers into the xWATHHR or
xFWATTHR registers after an integral number of line cycles, as
shown in Figure 76. The number of half line cycles is specified
in the LINECYC register.
The line cycle energy accumulation mode is activated by setting
Bit 0 (LWATT) in the LCYCMODE register. The energy accu-
mulation over an integer number of half line cycles is written
to the watt-hour accumulation registers after LINECYC number
of half line cycles is detected. When using the line cycle
accumulation mode, the Bit 6 (RSTREAD) of the LCYCMODE
register should be set to Logic 0 because the read with reset of
watt-hour registers is not available in this mode.
Phase A, Phase B, and Phase C zero crossings are, respectively,
included when counting the number of half line cycles by setting
Bits[5:3] (ZXSEL[x]) in the LCYCMODE register. Any combi-
nation of the zero crossings from all three phases can be used
1
In a 3-phase three wire case (CONSEL[1:0] = 01), the ADE7880 computes the
rms value of the line voltage between Phase A and Phase C and stores the
Configurations section). Consequently, the ADE7880 computes powers
associated with Phase B that do not have physical meaning. To avoid any
errors in the frequency output pins (CF1, CF2, or CF3) related to the powers
associated with Phase B, disable the contribution of Phase B to the energy-to-
frequency converters by setting bits TERMSEL1[1] or TERMSEL2[1] or
for counting the zero crossing. Select only one phase at a time
for inclusion in the zero crossings count during calibration.
ZXSEL[0] IN
LCYCMODE[7:0]
ZERO-
CROSSING
DETECTION
(PHASE A)
TERMSEL3[1] to 0 in the COMPMODE register (see the Energy-to-Frequency
Conversion section).
Depending on the polyphase meter service, choose the appro-
priate formula to calculate the active energy. The American
ANSI C12.10 standard defines the different configurations of
the meter. Table 15 describes which mode to choose in these
various configurations.
Table 15. Meter Form Configuration
ZXSEL[1] IN
LCYCMODE[7:0]
ZERO-
CROSSING
DETECTION
(PHASE B)
ZXSEL[2] IN
LCYCMODE[7:0]
ZERO-
CROSSING
DETECTION
(PHASE C)
LINECYC[15:0]
CALIBRATION
CONTROL
ANSI Meter Form
Configuration
CONSEL
5S/13S
6S/14S
8S/15S
9S/16S
3-wire delta
4-wire wye
4-wire delta
4-wire wye
01
10
11
00
OUTPUT
FROM
LPF2
AWGAIN
AWATTOS
INTERNAL
ACCUMULATOR
THRESHOLD
AWATTHR[31:0]
32-BIT
REGISTER
Bits[1:0] (WATTACC[1:0]) in the ACCMODE register determine
how the active power is accumulated in the watt-hour registers
34
WTHR
27 26
0
0
and how the CF frequency output can be generated as a
function of the total and fundamental active powers. See the
Energy-to-Frequency Conversion section for details.
Line Cycle Active Energy Accumulation Mode
In line cycle energy accumulation mode, the energy accumula-
tion is synchronized to the voltage channel zero crossings such
that active energy is accumulated over an integral number of
half line cycles. The advantage of summing the active energy
over an integer number of line cycles is that the sinusoidal compo-
nent in the active energy is reduced to 0. This eliminates any
ripple in the energy calculation and allows the energy to be
accumulated accurately over a shorter time. By using the line
cycle energy accumulation mode, the energy calibration can be
greatly simplified, and the time required to calibrate the meter
Figure 76. Line Cycle Active Energy Accumulation Mode
The number of zero crossings is specified by the LINECYC 16-bit
unsigned register. The ADE7880 can accumulate active power
for up to 65,535 combined zero crossings. Note that the internal
zero-crossing counter is always active. By setting Bit 0 (LWATT)
in the LCYCMODE register, the first energy accumulation
result is, therefore, incorrect. Writing to the LINECYC register
when the LWATT bit is set resets the zero-crossing counter, thus
ensuring that the first energy accumulation result is accurate.
At the end of an energy calibration cycle, Bit 5 (LENERGY) in
the STATUS0 register is set. If the corresponding mask bit in
the MASK0 interrupt mask register is enabled, the IRQ0 pin
also goes active low. The status bit is cleared and the IRQ0 pin is
can be significantly reduced. In line cycle energy accumulation
Rev. A | Page 48 of 104
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